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Machine Learning Science and Technology· 2026Q2

AMD Versal AI-Engines for fixed latency environments

Ioannis Xiotidis, Noah Clarke Hall, Tianjia Du, Nikos Konstantinidis et al.

Short summary

AMD Versal AI Engines (AIEs) can deploy machine learning algorithms like Boosted Decision Trees and Convolutional Neural Networks in fixed-latency environments, demonstrating feasibility for high-energy physics applications.

AI-generated from the title and abstract; the full text is not read.

Key points

  • AMD Versal AI Engines (AIEs) are evaluated for deployment in fixed-latency environments.
  • Vectorized Boosted Decision Tree (BDT) and Convolutional Neural Network (CNN) models were successfully deployed on AIEs.
  • The study demonstrates the feasibility of using AIEs for machine learning applications in high-energy physics data acquisition systems.
  • AIEs are presented as potential alternatives to traditional programmable logic for these tasks.

AI-generated from the title and abstract; the full text is not read.

Abstract

Abstract Complex, high-throughput data acquisition and processing systems, such as those used in high-energy physics experiments, are increasingly moving sophisticated pattern recognition and data compression algorithms closer to the sensors themselves. To meet these needs, programmable device manufacturers offer multi-silicon die packages that commonly include dedicated co-processors within the same package. We present a technical study of a new family of such co-processors from AMD Xilinx, the Adaptive Intelligence (AI) Engine, or AIE, as part of the Versal architecture. Specifically, we focus on the deployment capabilities of AIEs in fixed latency environments such as those typically found in colliding beam experiments like those at the Large Hadron Collider. We evaluate the performance of a vectorised implementation of both a Boosted Decision Tree (BDT) and a Convolutional Neural Network (CNN), thereby demonstrating the feasibility of deploying AIEs for ML applications in such environments and their use as possible alternatives to traditional programmable logic-based implementations

The authors' abstract, as published at the source. Machine Learning Science and Technology, 2026 · DOI ↗

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Field: Hardware and Architecture

Hardware and ArchitectureComputer Science