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ACM Transactions on Architecture and Code Optimization· 2026Q2

TSE-IO: Two-Stage Extrapolative I/O Modeling and Tuning via Pairwise Learning

Heng Liu, Xiaoshe Dong, Qiang Wang, Yifan Li et al.

Short summary

TSE-IO, a novel two-stage framework, accurately predicts parallel program I/O performance at large scales (e.g., 128 nodes) using only small-scale (1-16 nodes) training data, achieving a Mean Absolute Percentage Error (MAPE) below 20% for most workloads.

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Key points

  • TSE-IO is a two-stage framework for extrapolating I/O performance modeling and tuning from small to large scales.
  • The framework achieves a MAPE below 20% for most workloads when extrapolating from 1-16 nodes to 128 nodes.
  • Pairwise learning, combining delta-feature matching and anchor-based inference, transfers configuration-induced performance patterns.
  • Post-tuning, five applications showed speedups ranging from 16.38x to 65.38x compared to expert user settings.

AI-generated from the title and abstract; the full text is not read.

Abstract

Collecting I/O data for parallel programs at large node scales is prohibitively expensive and has long been a major bottleneck for I/O performance modeling. Existing approaches typically depend on extensive training samples collected on large-scale systems, which incur high cost and generalize poorly across applications and environments. To address these challenges, we propose TSE-IO, a T wo- S tage framework for E xtrapolative I/O performance modeling and tuning. TSE-IO decomposes cross-scale performance prediction into two linked tasks: first, extrapolating application-level I/O behavior from small-scale measurements to the target scale. And second, predicting target-scale performance by jointly modeling the extrapolated behavior and tunable I/O-stack configurations. For the second stage, TSE-IO introduces a pairwise formulation that combines delta-feature matching with anchor-based inference to transfer configuration-induced performance patterns learned at small scales to unseen target scales. Experimental results show that, when trained solely on measurements collected from 1-16 nodes, TSE-IO extrapolates the I/O time of IOR, S3D-IO, Flash-IO, FLASH, and LAMMPS to 128 nodes (2,048 processes), achieving a MAPE below 20% for the majority of evaluated workloads. After tuning, five representative applications exhibit significant I/O performance improvements, achieving speedups ranging from 16.38 × to 65.38 ×, and from 1.00 × to 2.79 × compared with expert user settings across different workloads, thereby demonstrating the effectiveness and generality of TSE-IO.

The authors' abstract, as published at the source. ACM Transactions on Architecture and Code Optimization, 2026 · DOI ↗

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Field: Hardware and Architecture

Hardware and ArchitectureComputer Science