ACM Transactions on Architecture and Code Optimization· 2017Q2
CACTI 7
- 525citations
- Q2SCImago
- 2017year
Short summary
CACTI 7 introduces a new tool to model memory I/O power and demonstrates specialized memory interconnects that improve DDR DRAM performance by 22% and reduce cost by up to 65%, or yield 18% performance gain and 23% power reduction with a custom parallel bus architecture.
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Hardware and ArchitectureComputer Science