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IEEE Micro· 2012Q1

Power-Management Architecture of the Intel Microarchitecture Code-Named Sandy Bridge

Efraim Rotem, Alon Naveh, Avinash Ananthakrishnan, Eliezer Weissmann et al.

Short summary

Intel's Sandy Bridge microprocessor incorporates novel power-management innovations to meet the market demand for portable, high-performance system-on-a-chip designs.

AI-generated from the title and abstract; the full text is not read.

Key points

  • Modern microprocessors are evolving into highly integrated system-on-a-chip designs.
  • Market demand requires portability without performance compromise.
  • An adaptive architectural approach is crucial for performance and efficiency.
  • Intel's Sandy Bridge microprocessor features new power-management innovations.

AI-generated from the title and abstract; the full text is not read.

Abstract

Modern microprocessors are evolving into system-on-a-chip designs with high integration levels, catering to ever-shrinking form factors. Portability without compromising performance is a driving market need. An architectural approach that's adaptive to and cognizant of workload behavior and platform physical constraints is indispensable to meeting these performance and efficiency goals. This article describes power-management innovations introduced on Intel's Sandy Bridge microprocessor.

The authors' abstract, as published at the source. IEEE Micro, 2012 · DOI ↗

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Field: Hardware and Architecture

Hardware and ArchitectureComputer Science