ACM Transactions on Autonomous and Adaptive Systems· 2026Q2
Hermes \({}^{+}\) : Adaptive Memory-Efficient Pipeline Inference for Large Models on Edge Devices
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- Q2SCImago
- 2026year
Short summary
Hermes (+) framework reduces large model inference memory by up to 81.1% and speeds up latency up to 4.49x on edge devices compared to state-of-the-art pipeline methods.
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Key points
- Hermes (+) uses the PipeLoad mechanism for adaptive memory-efficient pipeline inference.
- PipeLoad employs dynamic memory management and parallel model loading.
- A search algorithm balances inference latency and memory usage within Hermes (+).
- Hermes (+) achieves up to 4.49x latency speedup and 81.1% memory reduction for BERT/ViT.
- For GPT-2/GPT-J models, Hermes (+) offers 24.3x latency speedup and 67.2% memory reduction.
AI-generated from the title and abstract; the full text is not read.
Abstract
The application of Transformer-based large models has achieved significant success in recent years. However, the exponential growth in the parameters of large models introduces formidable memory challenges for edge deployment. Prior works to address this challenge mainly focus on optimizing the model structure and adopting memory swapping methods. However, the former reduces the inference accuracy, and the latter raises the inference latency. This paper 1 introduces PipeLoad , a novel adaptive memory-efficient pipeline execution mechanism. It reduces memory usage by incorporating dynamic memory management and minimizes inference latency by employing parallel model loading. Based on the PipeLoad mechanism, we present Hermes \({}^{+}\) , a framework optimized for large model inference on edge devices. In Hermes \({}^{+}\) , we adopt a searching algorithm to balance inference latency and memory usage. We evaluate Hermes \({}^{+}\) with Transformer-based models of different sizes on a CPU server and edge devices. Our experiments illustrate that Hermes \({}^{+}\) achieves up to \(4.49\times\) speedup in latency and \(81.1\%\) lower memory footprint than the state-of-the-art pipeline mechanism for BERT and ViT models, \(24.3\times\) speedup in latency and \(67.2\%\) lower memory footprint for GPT-2 and GPT-J models with 128 tokens.
The authors' abstract, as published at the source. ACM Transactions on Autonomous and Adaptive Systems, 2026 · DOI ↗
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Field: Hardware and Architecture
Hardware and ArchitectureComputer Science