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Sensors· 2026Q1

Topology-Guided Sparse Voltage Measurement Placement for Transient-Voltage Fault-Bus Localization: A Physically Governed Dual-System Evaluation

Jisheng Xing, Zhankun Wang, Yu Xu

Short summary

A topology-guided placement protocol for sparse voltage measurements improved transient-voltage fault-bus localization Top-1 accuracy by 4.55 percentage points over random placement on the IEEE39 bus system.

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Key points

  • Topology-guided placement protocol for sparse voltage measurements was evaluated for fault-bus localization.
  • On IEEE39, topology-guided placement achieved 4.55% higher Top-1 accuracy than random placement in original protocols.
  • In a reviewer-driven extension on IEEE39, topology-guided placement yielded 0.3683 Top-1 accuracy vs. 0.3564 for random, with a non-significant difference.
  • Topology-guided layout ranked first among all 84 feasible IEEE39 k=3 layouts for Top-1 accuracy, Macro-F1, and mean-hop error.
  • Performance varied with load-shift and resistance-shift tests, and analyses bounded the simulation results.

AI-generated from the title and abstract; the full text is not read.

Abstract

Sparse voltage measurements make fault-bus localization depend on measurement placement and the physical distinguishability of location labels. We evaluate a deterministic, label-independent topology-guided placement protocol with physically governed localization classes and leakage-resistant condition-level validation on IEEE39 and IEEE123. In the original base protocols, topology-guided CNN1D Top-1 accuracy exceeded the prespecified primary-random layouts by 4.55 and 1.67 percentage points, respectively, although both paired bus-by-condition intervals included zero. In the reviewer-driven 1701-event IEEE39 physical-condition extension, Top-1 was 0.3683 for topology-guided placement and 0.3564 for primary random; the paired difference was +0.0119 with a 95% interval of −0.0493 to 0.0898, which also included zero. Separately, complete enumeration of all 84 feasible IEEE39 k = 3 layouts ranked the topology-guided layout first in Top-1 accuracy, Macro-F1, and mean-hop error under the frozen CNN1D protocol. Load-shift tests produced near-chance Top-1 values, and resistance-shift performance was lower at 20 Ω than at 0.1 Ω. Fixed-capacity, classifier, noise, timing, confusion, and topology-error analyses further bounded the result. The evidence supports reproducible pre-training measurement planning within the tested simulations without establishing statistically certain or universal superiority.

The authors' abstract, as published at the source. Sensors, 2026 · DOI ↗

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Field: Hardware and Architecture

Hardware and ArchitectureComputer Science